Volodymyr Opanasenko

Doctor of Technical Science, Professor, Leading Researcher of the Department of Microprocessor Technology (№ 205).

Email: [email protected][email protected]
Tel.: +38 (044) 526 25 98

Google Scholar Profile


Volodymyr Opanasenko was born in February 28, 1957.


September 1973 – February 1979
Alexander Tupolev Kazan Aircraft Institute, faculty of radio-technical science, department of microelectronics. Degree: Master of Technical Sciences.
November 1982 – December 1985
Post Graduated in Institute of cybernetics (Kyiv, Ukraine), faculty of elements and devices of computer and control system. Degree: Ph.D. in computer engineering.
Since 2007, Doctor of technical science; since 2011, Professor of the Department of Information Technology Design Professor.

Areas of interest:

  • Reconfigurable Computing Techology.
  • Designing of problem-oriented FPGA-based devices and systems.

V.M. Opanasenko has 134 scientific works, including 2 scientific monographs in Ukraine and chapters in 2 scientific monographs abroad (Springer Publishing), 14 patents. 19 works are published in foreign publications, which are indexed in the scientific-metrical base Scopus (h-index = 5).

Scientific Results:

A methodology for constructing reconfigurable digital devices and systems based on PLD, including a system of formal methods and algorithms for parametric synthesis of functional modules and complex devices are developed. On this basis, the core of the combinational theory of the machines is developed – adaptive logical networks, designed for solving a wide class of problems, which reduce to the procedure of classification by direct structural implementation of algorithms by means direct mapping of input data into output data. The obtained scientific results created a methodological basis for the development of effective algorithms and reconfigurable devices that can improve the efficiency of mapping of input tasks and algorithms, architecture and structure of the developed FPGA-based devices and systems based on the criteria “performance – implementation complexity”.

A series of the FPGA-based reconfigurable devices have been developed: devices for the implementation of boundary functions, data sorting, median filters, matrix multiplication devices, floating-point mathematical processors (according to IEEE-754 standard), reconfigurable processor with conveyor data processing; a number of problem-oriented processors for small-space spacecraft management, and others.